Integrated circuit chips are generally formed by growing a layer of silicon dioxide on the surface of a polished silicon wafer, which is typically doped with a p-type impurity such as boron. Photolithographic techniques are thereafter employed to remove the oxide in selected regions where circuit elements such as transistors will be placed. In these regions, impurities are deposited on the surface of the wafer to form an n-type highly conductive layer, referred to as a buried layer, and an epitaxial layer is deposited. Successive oxide growths, photolithography steps, and diffusions are carried out to form integrated circuit elements, after which metallization is selectively applied to form electrical terminals and circuit interconnections. When "flip-chips" are to be formed, the electrical terminals are bumped with solder.
The chips on the wafer are electrically tested to determine whether they are functional or nonfunctional. Conventionally, the nonfunctional chips are marked with ink, subsequent to which the wafer is separated into individual integrated circuit chips. The nonfunctional chips, recognizable because of the deposited ink, are discarded. The functional chips are then mounted to substrates and electrically coupled thereto. After a functional chip has been electrically connected to a substrate, an underfill material is dispensed around the perimeter of the chip. The underfill material is intended to spread beneath the bonded integrated circuit chip. Thereafter, the underfill material is solidified in a curing process to provide mechanical support to the electrical connections.
However, the underfill material does not always sufficiently spread between the electrical connections of the chip and substrate. Therefore, the mechanical support provided by the underfill material may be only minimal, resulting in breakage of the electrical connections and malfunction of the device in which the chip is used. Furthermore, the numerous steps required for processing an integrated circuit chip can be time-consuming and inefficient.
Thus, what is needed is an improved method for processing an integrated circuit chip. The method should require fewer steps and provide a more evenly distributed underfill between the integrated circuit chip and substrate to which it is mounted.